1. Field of the Invention
The present invention relates to a novel programmable digital loop filter for a communications receiver. More particularly, the present invention relates to a programmable digital second order loop filter of the type employed in code tracking loops, carrier frequency and phase tracking loops and symbol timing loops.
2. Description of the Prior Art
Heretofore, analog and digital second order loop filters were known. Heretofore, digital loop filters employing large-bit registers at the input stage were coupled directly to large-bit parallel adders. Such input shift registers were adapted to be programmed to provide variable first and second order gain. Such prior art programmable loop filters were adapted to round the output of the parallel adder to a fixed number of bits but were not programmable.
It would be extremely desirable to provide a digital loop filter circuit which is simple, accurate and easily implemented on a very large scale integrated circuit chip, yet has programmable first and second order gain as well as programmable resolution of the filter output.